The present disclosure relates generally an integrated circuit (IC) device and, more particularly, to method for forming a gate structure.
As technology nodes shrink, in some IC designs, there has been a desire to replace the typically polysilicon gate electrode with a metal gate electrode to improve device performance with the decreased feature sizes. Providing metal gate structures (e.g., including a metal gate electrode rather than polysilicon) offers one solution. One process of forming a metal gate stack is termed “gate last” process in which the final gate stack is fabricated “last” which allows for reduced number of subsequent processes, including high temperature processing, that must be performed after formation of the gate. Additionally, as the dimensions of transistors decrease, the thickness of the gate oxide must be reduced to maintain performance with the decreased gate length. In order to reduce gate leakage, high dielectric constant (high-k) gate insulator layers are also used which allow greater physical thicknesses while maintaining the same effective thickness as would be provided by a typical gate oxide used in larger technology nodes.
There are challenges to implement such features and processes in CMOS fabrication. As technology nodes continue to decrease, particularly to 22 nm technology node and beyond, the spacing between gate stacks continue to decrease, which affects the pocket/LDD implantation process. The issue will be worse when a thick hard mask applied on a gate stack to increase the total thickness of the gate stack. A conventional hard mask layer needs to have a thick thickness to prevent boron being implanted in polysilicon gate electrode during a boron implantation process for forming LDD regions. It is difficult to remove a polysilicon gate electrode with boron species therein because of boron with positive charge. Hence, a thick hard mask is necessary in the conventional process to prevent boron being implanted in polysilicon gate electrode. However, the thick hard mask layer exacerbates the shadowing effects when forming pocket/LDD implantation process. Therefore, there is a need to provide a polysilicon gate electrode which can be removed easily without using a thick hard mask.